The present invention relates generally to programmable active filter stage circuits, and more particularly to a technique which increases the resolution of the bandwidth of a digitally programmable filter stage with respect to a bandwidth control word.
FIG. 1 shows a wide-bandwidth digitally programmable capacitor array 1 suitable for use in a RC active filter stage. Programmable capacitor array 1 has its terminals connected to conductors 2 and 3, respectively. The bits B7,B6,B5,B4,B3,B2,B1,B0 of a 8-bit control word are applied to the gates of N-channel switching transistors M7, M6, M5, M4, M3, M2, M1, and M0, respectively. The sources of transistors M7, M6, M5, M4, M3, M2, M1, and M0 are connected to conductor 3. The drains of transistors M7, M6, M5, M4, M3, M2, M1, and M0 are connected to first terminals of filter capacitors 4-7, 4-6, 4-5, 4-4, 4-3, 4-2, 4-1, and 4-0, respectively. Second terminals of those filter capacitors are connected to conductor 2. One terminal of a capacitor 6 of capacitance CFIX is connected to conductor 2 and the other terminal is connected to conductor 3. The capacitances of filter capacitors 4-0, 1, 2 . . . 7 are equal to C0, 2C0, 4C0, 8C0, 16C0, 32C0, 64C0 and 128C0, respectively. The binary exponential weighting of the foregoing filter capacitors as indicated by the numbers 1, 2, 4, 8 . . . 128 as shown along conductor 2 in FIG. 1. The capacitance CFIX is selected to establish a maximum bandwidth of a digital filter stage including capacitor array 1.
In digitally programmable wide-bandwidth RC active filter design, the filter bandwidth BW (or corner frequency Fc, usually specified at the 1 dB or 3 dB point) is usually adjusted by controlling the amount of capacitance C through the use of a bank or array of capacitors. Each capacitor is connected in series with a corresponding switch (usually a MOS transistor). Turning the switch on/off, the capacitor is added/removed to/from the equivalent RC network, varying the filter corner frequency Fc˜1/RC. In a conventional implementation, the capacitor array is usually composed of a defined number N of capacitors, in series with corresponding switches, the capacitors being binarily weighted by the factors 1, 2, 4, 8, 16, . . . 2N-1, respectively. The combination of those binary weighted capacitors provides a total capacitance that is a linear function of the control word or state programmed into the RC active filter, usually through a serial interface or calibration logic circuit.
Referring to curve A in the graph of subsequently described FIG. 3A, it shows that bandwidth points corresponding to successive binary steps are close together for low bandwidths and far apart for high bandwidths, due to the parabolic nature of the relationship between bandwidth and the capacitance of an RC filter. For example, on curve A a one-bit change in the binary control word B7,B6,B5,B4,B3,B2,B1,B0 changes the filter bandwidth from about 22 MHz to about 18 MHz. This very large change in bandwidth BW means that the bandwidth resolution with respect to the control word B7,B6,B5,B4,B3,B2,B1,B0 is very low for a programmable filter stage which includes programmable capacitor array 1.
However, in many applications it is highly desirable to keep the bandwidth resolution of a digital filter within a certain percentage, specific to the particular application, of the maximum bandwidth resolution value so that the filter bandwidth can be controlled with a desired level of accuracy. Consequently, it is also highly desirable that the bandwidth of a digital filter be as linear as possible with respect to the value of the digital bandwidth control word. Unfortunately, the relationship of the bandwidth of a RC circuit to the capacitance thereof is parabolic, i.e., the bandwidth is proportional to 1/C. Therefore, the desired linear relationship of the bandwidth of the digital filter to the value of the digital bandwidth control word is relatively difficult and impractical to achieve.
Because of the 1/C dependence of the filter bandwidth on the filter capacitance value, the filter bandwidth shows a parabolic behavior, with very small steps in bandwidth at large filter capacitance values (and consequently low bandwidth values) and very wide steps in bandwidth at low filter capacitance values (and consequently high bandwidth values). That is, the filter bandwidth has fine resolution with respect to the binary control word at low bandwidths and gross resolution with respect to the binary control word at high bandwidths.
This problem is more severe in filter design if a wide range of frequencies is required for the filter bandwidth. The problem could be minimized by increasing the number of control bits and consequently the number of capacitor “bit units” in the capacitor array, but this would reduce the frequency step sizes at high bandwidths at the expense of an even smaller frequency step sizes at low bandwidth and also at the expense of additional circuit complexity.
It is believed that increasing the number of binary control bits is the main known technique for increasing the bandwidth resolution of programmable active RC filters in the prior art. It would be highly desirable to provide a way of improving the bandwidth resolution of a programmable active RC filter without increasing the number of control bits to achieve a more uniform control of the bandwidth.
Thus, there is an unmet need for a way to provide a substantially lower percentage change in bandwidth of a programmable active RC filter for each binary step of the filter bandwidth control word than has been achievable in the prior art.